The present invention relates to a semiconductor memory device, and more particularly to a dynamic type semiconductor information storage device which employees dynamic memory cells.
In a semiconductor memory device a large number of memory cells are arranged in a matrix form of rows and columns, and a word line and a digit line pair are arranged for each row and column, respectively. A sense amplifier is connected to each pair of bit lines. The memory cell that is connected to a selected word line gives a minute differential signal to the bit line pair connected thereto, and the minute differential signal is amplified by the sense amplifier that is connected to the digit line pair. Thus, the digit line on the high potential side is charged to a power source potential (Vcc) and the digit line on the low potential side is discharged to the ground potential.
Along with the recent progress in the information storage capacity of the semiconductor memory device, the memory cell is miniaturized and the digit lines are adjacently disposed with a small distance therebetween. As a result, the capacitive coupling between the adjacent digit lines is becoming large while the read-out voltage to the digit line is becoming small due to the miniaturization of the memory cell. Accordingly, the respective digit lines are mutually influenced from the changes in the potential due to the amplification by the sense amplifiers of the adjacent digit lines, so that the noise-signal ratio is becoming deteriorated and the read-out margin is becoming decreased.
In order to resolve the above-mentioned problems the so-called twisted digit line structure is proposed, for example, in U.S. Pat. No. 3,942,164. In accordance with this technique, the pair of digit lines of one column mutually interchange their locations at the midpoint of the length of these digit lines, and the pair of digit lines of another column adjacent to the above one column mutually interchange their locations at the point of one quarter and again at the point of three quarters of their length. According to such structure of the digit lines, between the digit lines of the adjacent columns, the coupling capacitance between one digit line and one adjacent digit line to be charged and, the coupling capacitance between the one digit line and another adjacent digit line to be discharged have substantially equal capacitance values. For this reason, noises to the one pair of digit lines from the adjacent pairs of digit lines caused by the amplifying operation are canceled each other. However, the parasitic capacitance between the digit lines in the same digit line pair for each column still has a large value so that at the time of amplifying the minute signal read out on each pair of digit lines the capacitance between the digit lines acts to reduce the output of the differential sense amplifier.
Hence, the increase in the capacitance between the digit lines of each pair reduces the speed of the sensing operation and reduces the operational margin, which has been a big obstacle to the effort of increasing the operating speed.